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Liu Ying authored
A low pulse whose width is at least 40ms on pin SYSRSTN may reset the bridge, according to the chip maker. This patch adds gpio reset support for the bridge. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2e120abc
A low pulse whose width is at least 40ms on pin SYSRSTN
may reset the bridge, according to the chip maker.
This patch adds gpio reset support for the bridge.
Signed-off-by: Liu Ying <victor.liu@nxp.com>